The Kairos RISC-V port: critical sections, the yield, stack initialisation and the machine-software-interrupt context switch for RV32. One of the crates in the…
The FreeRTOS ports remade in Rust: the deterministic sim port (the oracle harness), the Posix host port, and the Cortex-M, RISC-V and Xtensa ports — the only…
The compiled wickra-zk guest program: the RISC-V ELF the prover runs and the image id the verifier pins, committed alongside the source that produces them.
Prover and verifier for wickra-zk: runs the deterministic wickra-backtest inside a risc0 zkVM guest and turns a receipt into a trustless, data-hiding proof of…