Search 12 packages
Found
detections shipping vulnerabilities yanked Build behaviour
fetched outside the registry undeclared fetch fetch went into the output linked a downloaded binary read credentials connected outside the registry
Packages 1–12 of 12 Version Findings Description Downloads When vhpi-sys cargo 0.6.0 clean Raw FFI bindings to the VHDL VHPI library. 2.9K 1d ago reticle cargo 0.0.5 clean A from-scratch VHDL / Verilog compiler in pure Rust: frontends, a unified IR, simulation, synthesis and FPGA/ASIC backends, with first-class IP integration. 209 7h ago astli-text cargo 0.3.0 clean Files, spans, and macro-expansion provenance for SystemVerilog tooling 153 14h ago astli-syntax cargo 0.3.0 clean Lossless syntax tree, lexer, and preprocessor for SystemVerilog 146 14h ago sv-lang-kinds cargo 0.1.2+slang.12.0 clean Generated kind enums (syntax, token, trivia, diagnostic) for slang, the SystemVerilog compiler frontend 140 1d ago astli-preproc cargo 0.3.0 clean Directives, macro expansion, and `include resolution for SystemVerilog 137 14h ago astli-parse cargo 0.3.0 clean Event-based parser building a lossless SystemVerilog syntax tree 130 14h ago astli-fmt cargo 0.3.0 clean SystemVerilog formatter that leaves the preprocessed meaning unchanged 118 14h ago astli-diag cargo 0.3.0 clean Rendering a SystemVerilog diagnostic: snippets, and the chains that explain them 116 14h ago astli cargo 0.3.0 clean SystemVerilog language tooling: a lossless syntax tree, a preprocessor, and a formatter 73 14h ago astli-cli cargo 0.3.0 clean The astli command: SystemVerilog formatting, and a dump of each stage of the pipeline 59 14h ago astli-index cargo 0.3.0 clean The top-level names SystemVerilog files declare and use, and the files a design needs 33 14h ago
