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Packages181–210 of 295VersionFindingsDescriptionDownloadsWhen
svod-device cargo0.2.0clean Device abstraction layer for the Svod ML compiler61416h ago
svod-schedule cargo0.2.0clean Optimization passes and pattern engine for the Svod ML compiler55916h ago
molframe-engine cargo0.5.2clean Typed workflow compilation and deterministic execution for MolFrame5152d ago
dispocheck cargo0.2.32clean Fast, production-ready disposable email detection for Rust with compile-time optimized lookups.5062d ago
svod-codegen cargo0.2.0clean Backend code generation for the Svod ML compiler49815h ago
jackdaw_rustc_wrapper cargo0.19.0-rc.0clean Thin rustc interceptor that redirects --extern bevy= to libjackdaw_sdk.so when compiling jackdaw extension/game projects. Invoked via .cargo/config.toml…4961d ago
baracuda-flashinfer-sys cargonot built 0.0.1-alpha.86 did not buildRaw C-ABI FFI surface for the vendored FlashInfer inference kernels (paged-KV decode, paged-KV append, cascade state merge, sort-free sampling). The launcher…49522h ago
zsh cargo0.13.1010 vulnerabilities 10The first JIT-compiled Unix shell — bytecode VM, Cranelift JIT, worker pool, AOP intercept, Rkyv caching4808h ago
binhards cargo0.1.1clean A CLI tool to inspect compiled binaries (ELF, PE, Mach-O) for security mitigations and insecure patterns.4783h ago
warble cargo0.17.0clean Warble front-end compiler: parse/resolve/validate a behavior profile into language-neutral IR (sans-IO).46620h ago
ddc-dec cargo0.1.27clean DEX → Java decompiler front-end over jdc-core45419h ago
svod-runtime cargo0.2.0clean Kernel execution runtime for the Svod ML compiler43416h ago
rucc-unpack cargo0.24.8clean Reads the container formats Microsoft's Windows SDK payloads arrive in, deflate and zip and cabinet and compound file, for the rucc C compiler.4262d ago
webfluent cargo5.3.32 vulnerabilities 2The Web-First Language — compiles to HTML, CSS, JavaScript, and PDF. 50+ built-in components, reactivity, routing, i18n, SSG, and template engine.3382d ago
pylon-shard-guest cargo0.22.23clean Write Pylon realtime shard logic in Rust and compile it to WebAssembly.3352h ago
guinea-slint-build cargo0.26.0clean Compiles an application's .slint tree for guinea-slint3342d ago
svod-tensor cargo0.2.03 vulnerabilities 3High-level lazy tensor API for the Svod ML compiler33115h ago
ironlab-scene cargo0.10.4clean Layout, scales and scene compilation from figure IR to a display list.30217h ago
rudb-qc-ir cargo0.9.1clean QIR, the flat SSA pipeline IR the query compiler's translators write and its backends read.2881h ago
stackless-idl cargo0.4.0clean Language-neutral stack IDL compile and emit for stackless28310h ago
rudb-qc-interp cargo0.9.1clean The query compiler's first tier: runs QIR pipeline functions without generating machine code.2581h ago
warble-cli cargo0.16.01 vulnerability 1Warble CLI — compile profiles, dispatch to the Claude Code or Vercel target, render dashboards, emit manifests, run eval.2582d ago
delvewright-dsl cargo0.35.1clean Staged JSON DSL types and schemas for Delvewright adventure-map campaigns — the format the delvec compiler reads.2491d ago
tsr_core cargonot built 0.3.0 did not buildCompiler primitives and collections for tsr2493d ago
rudb-qc-rt cargo0.9.1clean The query compiler's runtime: the pipeline ABI, strings, hash tables and the functions compiled code calls.2471h ago
rudb-qc-plan cargo0.9.1clean The query compiler's physical plan: the part of an optimized plan the compiled engine runs, or why it refuses.2461h ago
rudb-qc-pipe cargo0.9.1clean The query compiler's pipelines: the physical plan cut at its breakers, with each run of filters and projections folded into the pipeline it belongs to.2301h ago
llama-cpp-wrapper-sources cargo0.17.0clean Single source of truth for the C++ wrapper translation units and the include paths they compile against2268h ago
tishlang_runtime_gba cargonot built 4.0.0 did not buildno_std runtime facade for Tish compiled output on the Game Boy Advance (agb)2169h ago
reticle cargo0.0.5clean A from-scratch VHDL / Verilog compiler in pure Rust: frontends, a unified IR, simulation, synthesis and FPGA/ASIC backends, with first-class IP integration.20911h ago